Digital Design Engineer

ip design, SoC functional security architecture, Subsystem design

Fpga, C, Soc Architecture, Verilog, Scripting Languages, digital logic design principles, systemverilog, logic synthesis techniques, RTL design concepts, ASIC design methodologies, low-power design techniques, emulation platforms, assertion-based formal verification

Fpga, Verilog, System Verilog, I2c, Simulation Tools, Digital Design, cdc, RTL Coding, Memory Architecture, audio signal chain, Cadence, VHDL, TDM, LINT, constraint development, Synthesis, ASI, digital timing analysis, RDC

static timing analysis, Verilog, Python, Tcl, SDC development, Tempus, Cadence Innovus, simulation methodologies, Rtl Design, transistor-level concepts, Genus, digital circuit operation, custom layout fundamentals, place-and-route, multi-clock designs, Synthesis, digital design fundamentals, floorplanning, Physical Verification, systemverilog, CDC concepts, Timing Constraints, Liberty timing models, characterization concepts

Fpga, Microprocessors, Embedded Firmware, definition of electrical schematics, product design board level testing, manufacturing failures analysis, component obsolescence treatment, electronic design and development, alternative solution identification, integration and validation testing, test procedures definition and execution, product performance evaluation, Dfmea, hardware design development and testing, high-speed digital and analog electronic circuits, troubleshooting skills on Electrical Electronic boards, DFM tools, Hardware Verification, boards place route including signal integrity, Dft, Microcontrollers, Design and simulation tools