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Required Technical and Professional Expertise in DFT
Minimum 5 to 12 years of relevant experience .
Proficient in DFT architectures & methodologies that includes Scan, ATPG, MBIST, JTAG, etc.
Sound knowledge of DFT tools/methodology from cadence /Synopsys/Mentor tools
Good Experience in Python/Perl/TCL scripting
Job Location : Bangalore
Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3000+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.
Job ID: 104666335
Skills:
rtl verification , SoC-level DFT architecture implementation, LINT, Synthesis, ATPG, DFT timing, DFT Embedded Deterministic Test EDA tool Tessent, SoC DFT RTL implementation, MBIST, Low Power designs
Skills:
boundary scan , bist , DFT Engineering, Pattern Retargeting, Coverage analysis and improvement, Scan Chains, Xelium, Synopsys DFT Compiler, Scan Insertion, ATPG, DFT DRC Debugging and Resolution, Test Kompress
Skills:
Jasper, Perl, Verilog, Python, Tcl, Xcelium, Memory Test methodologies, Modus, Scan Insertion, VHDL, ATPG, Genus
Skills:
Soc Architecture, tessent DFT, DFT architecture definition, HDLs, Genus, Scan, Cadence digital implementation tools, Tempus, MBIST, JTAG boundary scan, ATPG flow implementation
Skills:
Perl, Logic Design, Python, DFT Engineering, SV, Post Silicon Testing, Coverage metrics, Constrained random testing, Uvm, Profiling Tools, Architecture Verification
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