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Job Description

Roles and Responsibilities

  • Develop RTL code using Verilog/VHDL
  • Work with Mentor DfT tools and Cadence tools for design and verification
  • Perform scan insertion, JTAG, ATPG DRC, and coverage analysis
  • Debug simulations using timing and SDF
  • Contribute to LBIST and Mixed Signal Radar IC-related projects (preferred)
  • Investigate simulation failures and perform root cause analysis
  • Collaborate with cross-functional teams; work independently and proactively
  • Communicate effectively with both written and verbal communication

More Info

Job Type:
Role:
Employment Type:
Open to candidates from:
Indian

About Company

We are a young, dynamic IT solutions and umbrella services company. System Audit is our thrust area and we have expanded our sphere to include various aspects of the same in our business endeavor. Founded on a vast IT experience, Shashwat is a technically sound and professionally reliable company with long term business relations as its singular objective. Our key differentiation in Audit space is our sound technological knowledge which helps us go beyond merely identifying and pinpointing the discrepancies. We give solutions In a short span of time since inception, we have earned the trust of customers across Maharashtra and our customers include business enterprises, educational institutes, banks and IT companies of repute.

Job ID: 118740213

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