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Key Responsibilities:
Proxelera is your premier outsourced product development partner (OPD), specializing in Semiconductors, Systems, and Bespoke Hardware. Proxelera combines process rigour with advanced technical expertise to deliver transformative solutions while fostering industry-academia collaboration and VLSI talent development.
Job ID: 133332121
Skills:
bist , simulation and verification flow, Scan Insertion, DFT specification definition, compressed ATPG patterns, debug and validation of DFT features, analog mixed-signal IPs, silicon bring-up, gate level simulations, ASIC DFT synthesis, low power designs, IJTAG tools and flow
Skills:
Jtag, Verilog, Dft, Mentor Tessent, TestCompress, TestKompress, ATPG, MBIST, Scan Insertion, Scan Chain Debug, IJTAG, IEEE 1500, GLS, NCSim, Xcelium
Skills:
Vcs, Perl, Python, Tcl, Scan Insertion, Post-silicon validation, P1687, TetraMax, ATE patterns, Tessent, JTAG protocols, ATPG, Gate level simulation, TestMax
Skills:
Static Timing analysis, Boundary Scan inserting tap controller, generating TDL for ATE, DFT simulation with and without SDF, analysing and improving scan coverage, P1500, Synthesis and formal verification tools, RTL based and netlist-based insertion flows, Stuck-At and At-Speed Faults, Inserting Scan and generating ATPG vectors, characterization DC Characteristics, DFT tools from Mentor, MBIST insertion and simulation
Skills:
Jtag, Tcl Scripting, scan insertion techniques, DFT IP integration, Memory BIST generation, MBIST, Analog Macro tests, gate level simulation, Fault Models, ATPG, Scan, test point insertion, SDF simulations
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