DFT Engineer

Job Location: Kochin

DFT

Hands-on experience with Scan, EDT, SSN insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.

Hands-on Experience to do MBIST Insertion, Verification including Repair mode, Pattern generation.

Spy Glass experience to resolveDFTDRC at RTL stage.

SoC Translation flow, Patterns hand-off.

Post Silicon Debug on Tester.

Strong co-working experience with other dependent functions, Constraints development, STA & Physical Design.

Should be able to handle team of 4-6 members. Drive team towards meeting Milestone in high pressure situation.

Added advantage if Lead has executed 2-3 Projects in Intel flow.

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