DFT Engineer
DFT Engineer
GlobalFoundries- Posted 21 hours ago
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Job Description
The DFT Engineer delivers hands-on expertise in designing and deploying advanced Design-for-Test solutions for semiconductor chip development. This role drives robust DFT architectures—including ATPG, MBIST, LBIST, and analog test solutions—while implementing optimized methodologies for rapid test pattern generation and efficient project delivery.
Your Job
Your Job
- Implement DFT architectures including ATPG, MBIST, LBIST, scan insertion, and analog test features under manager guidance.
- Execute test pattern generation and optimization to minimize test time while maximizing coverage and manufacturing yield.
- Apply standardized DFT methodologies and flows to deliver efficient, repeatable results across multiple projects.
- Integrate DFT requirements into RTL and physical design stages through collaboration with design, verification, and backend teams.
- Develop automation scripts (TCL, Python, Perl) for test pattern creation, validation, and analysis.
- Analyze test data from silicon bring-up and production to identify improvements and support root-cause debugging.
- Document DFT implementations, test results, and reuse IP for team knowledge sharing.
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 4+ years of hands-on DFT experience on SoCs, including ATPG, MBIST, LBIST, and scan-based testing.
- Proficiency with EDA tools such as Synopsys TestMAX, Cadence Modus, or Mentor Tessent for DFT insertion and pattern generation.
- Experience with scripting languages (Python, Perl, TCL) for flow automation and data analysis.
- Familiarity with optimizing test time, fault coverage, and ATPG patterns.
- Strong analytical skills and attention to detail for debugging complex test failures.
- Effective communication skills for cross-functional collaboration.
- Experience with automotive ASIL flows or high-volume manufacturing test challenges.
- Proactive contributor to process improvements and tool evaluations.
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Key Skills
About Company
Skills:
Perl, Python, Tcl, scan compression, BSCAN, Simulation, MBIST, DFT insertion, ATPG, LBIST, pattern generation, IJTAG
Skills:
Vcs, Perl, Python, Tcl, Scan Insertion, Post-silicon validation, BScan, P1687, TetraMax, ATE patterns, JTAG protocols, Gate level simulation, Tessent tool sets, TestMax
Skills:
Perl, Scripting Languages, simulation tool suite, DFT techniques, scan compression, MBIST architecture, Scan Insertion, RTL lint checking, ATPG process, Synopsys DFT, Mentor Tessent
Skills:
boundary scan , Debugging, Tessent tools, coverage analysis, DFT – Scan ATPG, Debug, thermal sensors, SSN EDT, JTAG networks, DFX DV for IP debug units, TDR verification, clock-stop features, scan pattern generation, Pll, test-case development, clock analog observe, AFM fault models, scan pattern simulation, RO, root-cause analysis
Skills:
SSN LBIST, MBIST insertion simulation and debug on RTL and gates netlist, Verilog Hdl, At-Speed LBIST coverage analysis, STA DFT Test mode timing constraint development and analysis, Simulators and waveform debugging tools, Scan ATPG with SSN Stuck-At, Scripting with Perl Tcl, ATE silicon debug, Simulation and debug, Scan insertion with compression, Boundary Scan insertion simulation and verification