DFT Engineer
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DFT Implementation
Job ID: 153516763
Skills:
boundary scan , Digital Logic Design, Jtag, Perl, Verilog, Loopback, Python, Tcl, DFT methodologies, Timing Analysis, MBIST, Siemens Tessent, circuit fundamentals, IEEE 1500, IEEE 1687, ATPG coverage analysis, compressed scan, Cadence Modus, Genus, SDF-based simulations
Skills:
test solutions for high-volume designs, DFT architecture planning automation, DFT strategy planning
Skills:
Embedded Software, Jtag, Technology, Hardware-VLSI, IDE/Compilers/Debuggers/SDK, LBIST, Design for Test
Skills:
Perl scripting, Delay Faults, Pattern Simulation, Siemens Tessent, Transition Faults, Synopsys TestMAX, Pattern Generation, DFT Compiler, Scan Insertion, DFT implementation, DFT DRC violations, ATPG, Cadence Modus, Stuck-at Faults
Skills:
Jtag, Perl, Verilog, Python, Tcl, gate-level DFT simulations, Scan Insertion, Cadence DFT EDA tools, MBIST, Siemens Tessent, Synopsys TestMAX, systemverilog, DFT implementation and verification, DFT rule checking, ATPG, scan chain stitching, Boundary Scan BSCAN
