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As a Design Verification Engineer, you will contribute to exploring innovative hardware designs to enhance our devices. You will define verification methodology and implement test plans for advanced functional blocks while collaborating with cross-functional teams to develop world-class hardware devices. You will participate in the bringup of such blocks on simulation and emulation platforms.
You will work closely with multi-disciplinary groups including Architecture, RTL Design, PD, Validation, Software and Product Design to architect and implement verification environments for complex functional block that enable development of world-class hardware devices. In this role, you will:
. Architect and implement verification environments for complex functional blocks
. Create and enhance verification environments using SystemVerilog and UVM
. Develop comprehensive test plans through collaboration with design engineers, SW and architects
. Implement coverage measures for stimulus and corner-case scenarios
. Participate in test plan and coverage reviews
. Drive complex RTL and TB debugs
. Drive UPF based low power verification
. Contribute to verification activities across simulation and emulation platforms
. Work on creating the automation scripts to support DV methodologies
. Create infrastructure to performs system level performance analysis
About the team
Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced numerous devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create The team that built the innovative SoCs AZ3 and AZ3 Pro that power the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers.
Work hard. Have fun. Make history.
- Bachelor's degree in Electrical Engineering or a related field
- 2+ years of design verification experience with UVM, System Verilog and/or C based testbenches
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Experience working with and managing third party vendors
- Knowledge of serial protocols including SPI, I2C, I3C, and UART
- Experience with high speed protocols like USB, PCIE, DDR
- Experience with integrating third party VIPs
- Experience with integration verification of several third party IPs into the SoC
- Experience with C/C++ and Object-Oriented Programming.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.
Job ID: 147879991
Skills:
Vcs, Jenkins, Git, Pcie, Ethernet, Python, System Verilog, Tcl, Xcelium, SERDES, Uvm, GitLab CI, formal verification, Questa
Skills:
Tcp, Pcie, Ethernet, System Verilog, Forwarding logic Parsers P4, RDMA, Building test benches from scratch, System Verilog constraints structures and classes, Palladium, Verifying sophisticated blocks clusters and top level for ASIC, Zebu, Veloce, ASIC verification using UVM, HAPS, formal verification
Skills:
hardware engineering , Vcs, Perl, Python, Xcellium, NCSim, Uvm, UPF, systemverilog, Low power verification, Gate level simulation, VCFormal, Jaspergold, Questa, Functional Verification, Modelsim, formal verification
Skills:
test environments , Test Cases, Low-power design verification, Regression systems, Industry-standard simulators, Verification methodology, Revision control systems, Verification testbenches, Functional coverage, systemverilog
Skills:
snoops, Coverage, SystemVerilog UVM assertions, ARM AMBA CHI, Ordering, caches, cache coherency concepts, MESI, SystemVerilog UVM, load store atomics, multicore CPU architectures, MOESI
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