Design Engineer
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This job is no longer accepting applications
Experience 4- 6 years
Location Hyderabad
Qualification M. Tech (or) B. Tech in Marine Structure or Civil Structures
Desired Profile
Job ID: 110781237
Skills:
Routing, Python, Tcl, CTS, floorplanning, Placement Optimization, Antenna Density, LVS, Power Planning, IC Validator, Calibre, Physical Verification, Signoff Closure, Physical Design, ERC, Timing Closure, ECO Implementation, DRC
Skills:
Perl scripting, PrimeTime-SI, primetime, Antenna Checks, LVS, Substrate Bias, IR Drop Analysis, low power design, Physical Verification, Physical Design, Timing Closure, Synopsys Physical Design tools, Power Gating, Floor Planning, DRC, Voltage Islands
Skills:
Generation of detailed parasitic information, Signoff Static Timing Analysis, Static and Dynamic rail analysis, Block level floor planning, LVS, Signal integrity analysis, Physical Verification, Design for yield techniques, Timing driven placement and routing, DRC, Place And Route, Timing-optimization tasks, Power routing
Skills:
Routing, Automation, LPDDR5, Verification processes, HBM3, DDR5, Design validation, Tape-out revisions, Floor-planning, Modeling and simulation, Parasitic modeling, LPDDR6, Memory Logic Analog circuits, Placement
Skills:
Tcl, PERL, Cadence, Floor Planning, SI Aware Routing, Synopsys, Voltage Islands, Timing Analysis Closure, ECO Tasks, Physical Verification, Timing Optimization, Substrate-bias Techniques, Asic Physical Design, Power Gating, Physical Design, Timing Closure on High Speed Interfaces, low power design, IR Drop Analysis, Antenna Checks, Signal Integrity Closure
