

Search by job, company or skills

Hi,
Greetings from ACL Digital,
Looking for CPU Verification Engineers
Exp level: 4+years
Location: Banglore
Job Description:
We are seeking a skilled and motivated CPU Verification Engineer to join our microprocessor verification team. In this role, you will contribute to the verification of high-performance, low-power CPU cores by developing scalable testbenches, driving complex test scenarios, and ensuring full functional coverage and quality sign-off
Responsibilities:
1.Verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/DDRx/LPDDRx/AI accelarator integration verification in SoC RTL.
2.Your key responsibilities will include writing test plans, defining test methodologies, developing C based software tests, SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues.
3.Working with project management and leads on planning tasks, schedules, and reporting progress
4.Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development
Required Skills and Experience :
Proven understanding of digital hardware verification language Verilog/Systemverilog HDL
Experience in SoC verification using Embedded Low-level programming including C/C++ tests and assembly language(preferably ARM)
Experienced in one or more of various verification methodologies – UVM/OVM, formal, power aware verification, emulation
Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support
Good Problem Solving and Debugging skills.
Knowledge of SoC Verification Flow and strategy.
Experience with ARM-based designs and/or ARM System Architectures, SoC Boot flow, Cache coherency
Porting peripheral driver software for SoC tests
Clock Domain Crossing verification
Experienced in GLS, DFT/DFD,
Experienced in UPF Power Aware verification
Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.)
Qualifications:
Interested can CV to [Confidential Information]
Job ID: 153636371
Skills:
Shell, Perl, Debugging Tools, Python, verification methodologies, ASIC SOC verification, CPU GPU architecture or verification, Uvm, systemverilog
Skills:
Makefile, Perl scripting, Verilog, Oop Concepts, Ruby, System Verilog, CPU architecture, Verification flows, Rtl Design, Asic Design Verification, JTAG protocols, Digital Design, Debugging firmware, Assembly language programming
Skills:
C, Jtag, Verilog, Scripting Languages, System Verilog, IEEE1500, HDLs, memory dump, advanced verification techniques, MBIST, scan dump, formal verification methodologies, CPU micro-architectures, Dft, CPU architectures, power management features
Skills:
C, Fpga, Scripting, Verilog, coverage closure, Uvm, gate-level simulation, RTL testbench debugging, systemverilog, Emulation, subsystem integration, memory hierarchy, Arm CPU architecture, interrupts, coherency protocols, post-silicon validation
Skills:
Makefile, Perl scripting, Verilog, Oop Concepts, Ruby, System Verilog, Post-silicon debugging, CPU architecture, Verification flows, Rtl Design, Asic Design Verification, JTAG protocols, Digital Design, Debugging firmware, Assembly language programming