Cadence APD Package Design

Responsibilities:

• IC Package Design Engineer
• Experience with Cadence APD IC Package Design experience with Cadence APD
• Good understanding of package/substrate design and package assembly rules related to flip chip designs.
• Exposure to different package technologies such as MCM, flip chip / wire bond, 3D, 2.5D etc., added advantage
• Expertise in High-Speed Complex Package and PCB designs with HDI, Blind and Buried Via technologies.
• Hands-on expertise with PCB designs involving High Speed Parallel Bus interfaces including DDR, GDDR and HSIO interfaces including PCIe, SERDES.
• Good Exposure to Stackup design, DFM, DFA rules and adherence.
• Should have expertise in constraint setting in layout tool.