ASIC/ SOC Design Engineer

3-6 Years

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Early Applicant

Job Description

: ASIC/ SOC Design Engineer

Experience: 3 - 6 Years

Location: Bangalore

Technical Requirements

Strong in Digital logic design and hands-on RTL coding experience using Verilog/ VHDL or System Verilog.
Experience in high speed/ low speed peripherals design.
Good understanding of synthesis, timing constraints, CDC, logic optimization.
Experience in unit level verification setup, assertions.
Exposure to low power design techniques with multiple power/clock domain.
Exposure to ARM SoC/ AMBA IP based designs and SoC/ sub-systems integration.
Working knowledge with protocols-PCIe, DDRx, Ethernet, USB, AXI, AHB, APB, I2C, SPI is added advantage.

Expectations from the Role:

Good communications/ inter-personal skills and ability to work independently or as a team.
Fast learner and able to work in a distributed work environment.
Demonstrated ownership and punctuality.