ASIC DV Engineer, PCIe Verification
ASIC DV Engineer, PCIe Verification
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Job Description
Meta is looking for ASIC DV Engineer, PCIe Verification to join our dynamic team and embark on a rewarding career journey.
- Develop and implement verification plans for ASIC designs.
- Conduct research to stay current with advancements in ASIC verification technology.
- Collaborate with cross-functional teams to integrate verification solutions.
- Monitor and troubleshoot ASIC verification processes to ensure reliability.
- Optimize verification processes for performance and efficiency.
- Ensure compliance with industry standards and regulations.
- Prepare and present reports on ASIC verification activities and performance.
More Info
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Industry:
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Key Skills
ASIC verification technology
ASIC verification processes
ASIC DV Engineer
PCIe Verification
ASIC designs
ASIC verification activities
About Company
Skills:
Scripting, Computer Architecture, Perl, Pcie, Verilog, Object Oriented Programming, System Verilog, Python, Automation of verification processes, Asic verification, UVM based verification frameworks, CXL
Skills:
Scripting, Pcie, Perl, Verilog, Object Oriented Programming, Python, System Verilog, UVM based verification frameworks, CXL, Asic verification
Skills:
Bus protocols - APB, C, Usb, Uart, Spi, Test Plan Creation, Pcie, I2c, System Verilog, Bus interconnects, Checkers, i2s, Uvm, Functional coverage, DP, Sd, AHB, Verification methodology, Gate-level simulations, Scoreboards, Gate Level Power-Aware simulations, Axi
Skills:
Pcie, Systemc, Jenkins, Python, Perl, MATLAB, Design Verification, DV, Design Verification Lead, IP Verification, Subsystem Verification, systemverilog, Uvm, formal verification, Functional Verification, Constraint Random, Coverage Closure, Verification Plan, Specman E, Xcelium, Vmanager, Verilog-A, RNM, C Modelling, ISO 26262, Semiconductor, Pre-Silicon Verification