Analog layout engineer

Responsibility:

Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support.

Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must.

Perform layout verification like LVS/DRC/Antenna, quality check and support documentation.

Responsible for on-time delivery of block-level layouts with acceptable quality.

Excellent problem-solving skills in physical verification of custom layout.

Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment.

Ability to guide junior team-members in their execution of Sub block-level layouts & review critical items.

Contribute to effective project-management.

Effectively communicating with Local engineering teams to assure the success of layout project.

Educational Background

BE or MTech in Electronic/VLSI Engineering

5 + year experience in analog/custom layout design in advanced CMOS process.

Hiring progress

Cv screen+F2F interview.