Key Responsibilities / Preferred Experience
WORKPLACE TYPE: ON-SITE
We are seeking an Analog Layout Engineer experienced in full custom layouts targeting advanced process nodes. The role requires strong layout electrical-parameter knowledge, quick learning ability, and hands-on experience with CAD tools for building IP/macro cells.
- Execute full custom layout in cutting-edge technology nodes.
- Design and manage sub-cells / leaf-cells required to build IP/macro using layout/CAD tools.
- Perform chip-level integration, physical verification, and electrical closure.
- Work across custom layout domains including digital, analog, and mixed-signal layouts.
- Apply and validate reliability concepts and layout electrical parameters to achieve closure.
Requirements
- 3–8 years of relevant experience in analog/custom layout (e.g., PLL, Bandgap, ADC, DAC).
- Strong understanding of layout electrical parameters and the ability to achieve electrical closure.
- Solid knowledge of reliability concepts related to custom layout.
- Experience with physical verification tools and flows (DRC, LVS) and Mentor/Calibre.
- Proficiency with Cadence Virtuoso layout environment and associated CAD tools.
TOOLS & FLOW
Cadence Virtuoso; Mentor/Calibre (DRC, LVS); layout CAD tools and chip-integration flows.
NOTE
This position is intended for Analog Layout Engineers with hands-on experience in custom block layout (PLL, Bandgap, ADC, DAC) using Virtuoso, Calibre, DRC, and LVS.
Skills: cad tools,layout,dac,bandgap,analog layout
