Job Description:
Analog layout designer providing onsite support for advanced nodes, working with global layout and design team.
- Candidate should work independently on block level and IP level Analog layout design, coordinating with the circuit designer & the layout team
- Candidate should have minimum 8+ years of hands-on experience in Analog or RF layout.
- Should have worked on floorplan and layout for analog modules like SerDes, ADC/DAC, PLL, etc.
- Should have worked on and top-level integration
- Should have a good understanding of analog layout concepts for deep sub-micron processes and knowledge of fabrication process, preference will be given to FinFet experience candidates.
- Should have a good understanding of ESD, latch-up, EM, and strong skills debugging DRC, LVS, and antenna errors.
- Job Complexity: Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors. Exercises judgment in selecting methods, techniques and evaluation criteria for obtaining results. Networks with key contacts outside own area of expertise.
- Supervision: Determines methods and procedures on new assignments and may coordinate activities of other personnel (Team Lead).
- Experience with Cadence tools and TSMC processes are preferred
R024432
