Analog Layout Engineer

Calibre, Analog Layout, Mixed signal layout, DRC, Custom Layout, Chip level integration, Reliability concepts, virtuoso, Physical Verification, LVS, CAD Tools

DRC, LVS, semiconductor fundamentals, Parasitic Extraction, Cadence Virtuoso, ERC, precision analog layouts, analog layout design, CMOS technology

Python, Cadence Virtuoso, EMIR, chip assembly techniques, LVS, AMS Layout Verification flows, DRC, Skill

layout techniques for analog and mixed-signal circuits, Cadence Virtuoso Layout Editor VLE VXL, Mentor Graphics Calibre DRC LVS

Parasitic effects, LVS DRC PEX EMIR verification flows, xACT, Reference circuits, Calibre DRC, Bandgap Oscillators, StarRC