Analog Design Engineer, Senior

• Develop and maintain circuit design methodology flows and documentation.
• Identify and refine circuit implementations to achieve optimal power, area and performance targets.
• Propose design and verification strategies that efficiently use simulator features to ensure highest quality design.
• Oversee physical layout to minimize the effect of parasitic, device stress, and process variation.
• Collaborate with digital RTL engineers on the development of calibration, adaptation and control algorithms for analog circuits.
• Present simulation data for peer and customer review.
• Mentor and Review the progress of junior engineers.
• Document design features and test plans.

Required Qualifications:

• Bachelor with 2 years experience or MSEE (or PhD) in Electrical Engineering, Computer Engineering, or similar technical field
• In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals.
• Silicon-proven experience implementing circuits like bandgap references, voltage regulators.
• Detailed design experience with high custom logic design
• Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects.
• Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.).
• Experience with EDA tools for schematic entry, physical layout, and design verification.
• High proficiency with spice simulators including HSPICE, Finesim and XA
• Knowledgeable in Verilog-A and/or System-Verilog for analog behavioral modeling and simulation-control / data-capture.

Plus Qualifications:

• Ability to provide automation for rapid and dynamic design needs is highly sought-after
• Experience with STA and cell characterization such as Nanotime, Primetime, SiliconSmart
• Experienced in STAR or similar extractor to debug extraction issues
• Extensive programming skills in languages such as Python, Perl, TCL and C/C++