AMS Verification Engineer
AMS Verification Engineer
Innova solutinosThis job is no longer accepting applications
Job Description
- Industry experience in analog/mixed signal behavioral modeling at various levels of abstraction and full chip verification (AMS and DMS DV) using SV RNM or Custom UDNs.
- Good understanding of analog design concepts and mixed signal design architectures. Exposure to products that integrate a wide variety of Analog/Mixed-Signal building blocks such as Power Management, PLL/Synthesizers, bandgap references, oscillators, SerDes etc. and related digital control and signal processing.
- Demonstrated experience of verification plan development, UVM verification environment development/debug and verification of complex mixed signal products at block, Subsystem & chip-top levels.
- Familiarity with Analog/Mixed-Signal/RF design architectures and debug experience with schematic capture tools such as Cadence Virtuoso and waveform viewers such as Cadence Simvision.
- Experience of co-simulations with analog model/transistor level and digital RTL/Gate+SDFs, experience of circuit simulations with Spice/Fast Spice simulators.
- Experience and debug with digital simulators such as Cadence Xcelium/DMSO/Synopsys VCS.
- Experience in developing self-checking testcases, functional/code coverage & formal verification.
- Tracking of verification metrics and regression management, Metric Driven Verification (MDV) framework using tools such as Cadence vManager.
- Experience in closing the verification of analog designs using industry standard metrics is a must.
- Quick to adopt new technologies with good problem-solving skills.
- Collaborate and work closely with team members from various disciplines (system architects, digital design, analog design, digital DV etc.).
- Self-motivated and enthusiastic.
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Key Skills
About Company
Innova Solutions is a trusted global technology partner specializing in transformative digital solutions. Innova's robust technology and talent offerings span across an array of industries and include generative AI, data & analytics, cloud computing, digital product engineering, and cybersecurity. Through offices and global delivery centers across North America, Europe, and APAC, our Innovators deliver strategic technology and business transformation solutions to clients enabling them to operate as leaders within their fields.
Skills:
Real Number Modeling (RNM), Verification Coverage Analysis, Cadence Xcelium, coverage analysis, DAC Verification, Root-Cause Analysis, Mixed-Signal Waveform Analysis, Mixed-Signal Simulation, PLL Verification, ADC Verification, Regression Debugging, Mixed-Signal Interfaces, Cadence ADE Assembler, Analog Mixed-Signal Verification, Mixed-Signal Testbench Development, Cadence Mixed-Signal Design Environment, Analog Behavioral Modeling, Mixed-Signal Behavioral Models, Simulation Debugging, Analog Building Blocks, AMS Verification, Verilog-AMS, Cadence Virtuoso, AMS Verification Methodology
Skills:
simvision , Perl, Shell scripting, Python, Tcl, Xcelium, VIVA, VerilogAMS, Virtuoso ADE Assembler, SV RNM, System Verilog UVM, Regression flows
Skills:
System Verilog, Visual Studio Code, GitHub Copilot, Mixed-Signal verification, Hspice, Uvm, Cadence Xcelium-AMS, Spectre
Skills:
Shell, Perl, Scripting, Tcl, debug methodologies, automation using Python, Uvm, assertion-based verification, systemverilog, regression frameworks, coverage closure, formal verification, Functional Verification
Skills:
rtl verification , Debugging, AMS IP Verification, AMS IP Integration, SoC-Level Verification, Sub-System Verification, PDL Test Case Development, Gate-Level Simulation, Timing Simulation, Virtual Tester Simulation, Tessent DFT, DFT Pattern Generation, Pattern Simulation, Testbench Bring-Up