We are looking for an experienced Advanced Packaging Layout Engineer with strong expertise in 2.5D/3D IC packaging and high-speed interface layout design.
Key Responsibilities:
- Edit and modify existing GDSII layouts
- Merge and manage multiple GDS files
- Perform script-based layout automation (GDS modifications)
- Design power planes and translate power requirements into layout
- Execute device placement, routing, floor planning, and optimization
- Ensure compliance with foundry PDK rules and layout guidelines
- Work on advanced packaging technologies including chiplets and HBM
Must Have Skills (MANDATORY):
- Strong experience in 2.5D / 3D IC Packaging
- Hands-on with GDSII Layout Editing & Floorplanning
- Experience in DRC / LVS / ERC verification flows
- Expertise in tools: Cadence APD / Mentor Xpedition (XPD) / KLayout
- Knowledge of chiplets, HBM stacks, fan-out packaging
- Understanding of high-speed interface layout techniques
Good to Have:
- Scripting skills in SKILL / Python / Tcl
- Experience in layout automation
