rtl development , Usb, Pcie, Ethernet, AI tools, UFS, HSIO standards, micro-architecture

Computer Architecture, Verilog, System Verilog, Python, Logic Design, Tcl, Synthesis and Physical Design flows, Digital Design Techniques, device physics

UVM (Universal Verification Methodology), Tcl, Mercurial, Svn, DDR, Git, Perl, Pcie, Ethernet, Arm, Python, RISC-V, systemverilog, AMBA, Emulation, C/C++, System Verilog Assertions, Design Verification infrastructure