PCIe Formal Verification Engineer, PCI Express, formal verification, FPV, SVA, SystemVerilog Assertions, Questa Formal

Verilog, SoC Verification, formal verification techniques and tools, model checking, equivalence checking, VHDL

Data Flow Graphs (DFG), Binary Decision Diagrams (BDD), Verilog, System Verilog, model checking, abstraction modeling, formal verification tools, convergence strategies, equivalence checking, simulation techniques

Verilog, Chisel, VHDL, JasperGold, formal verification, VC Formal, systemverilog, Formal Abstraction Techniques, Object-oriented Programming

SystemVerilog Assertions (SVA), Perl, Python, Tcl, PSL, OneSpin, JasperGold VC Formal

Rtl Design, Synthesis, ASIC development cycle, formal verification, ASIC design methodologies, architecture, Verification