Tcl Scripting, EDA timing tool competence, primetime, spyglass, Tweaker, SDC knowledge, Fishtail, GCA, Synopsys Design Compiler, DMSA

Matlab, Worst case identification, Monte Carlo analysis, Block level topology selection, AMs, Analog Circuit Design, Spectre, Cadence tool set, Top level simulation, Simplis, IC system partitioning and architectural tradeoff analysis, Hand analysis and IC transistor level implementation, Post layout parasitic extraction, Schematic generation and simulation on modern CAD tools

Design for Manufacturing (DFM), Design for Assembly (DFA), bom management , Detailing, Sheet Metal Design, Manufacturing and Fabrication Processes, Ptc Creo, 3D Modeling, gd&t

tolerance analysis , Design for Manufacturability (DFM), Design for Assembly (DFA), New Product Introduction (NPI), Technical Documentation, Prototype Development, Engineering Mechanics, Engineering Drawings, Design Verification, Engineering Calculations, Strength Of Materials, gd&t, Lean Six Sigma, Product Development, Mechanical Design

Design for Manufacturing (DFM), Design for Serviceability (DFS), Design for Assembly (DFA), Expression-based modelling, Tolerance stack-up analysis, Fmea, Interference checks, gd&t, Part families, Large assembly management, Nx Cad, Manufacturability evaluations, Parametric modelling

regulators , Computational Fluid Dynamics (CFD), tolerance analysis , Finite Element Analysis (FEA), actuators, High-pressure systems, Mechanical design calculations, Cryogenic fluids, gd&t, Material Selection, Valves, Fluid connectors, Fluid-control equipment, Aerospace Engineering, Mechanical Engineering, Sealing systems

Product Lifecycle Management (PLM), Bills of Materials (BOM), Load Path Evaluations, 2D Manufacturing Drawings, Siemens Nx, Design Risk Assessment, GPS Standards, Inspection Specifications, Structural Load Calculations, Design of Bolted, gd&t, and Sheet Metal Structures, Teamcenter, Dfmea, Rigging Calculations, FEM Validation, Welded, Tolerance Stack-Up Analysis, Material Masters

jitter and signal equalization techniques, Cadence tool experience, Phase Interpolator, CMOS design, High Speed Clock Distribution, Bias and Bandgap Voltage Regulators, Low jitter PLL, CAD tools for circuit simulation, layout and physical verification, SERDES