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Showing 5 jobs
Skills:
C, Vcs, Jtag, Perl, Verilog, Python, Tcl, Debug features, UPF support, systemverilog, Scan Boundary Scan, VHDL, DFX Design Planning, Low Power technologies
Skills:
Digital Logic Design, Rtl Design, SOC Integration, RTL quality checks, Constraints for Subsystem IP, ip design, Processor peripherals
Skills:
C, Vcs, Perl, Verilog, Python, Tcl, Jtag, Debug features, UPF support, systemverilog, VHDL, DFX Design Planning, Low Power technologies, Scan Boundary Scan
Skills:
C, Vcs, Jtag, Perl, Verilog, Python, Tcl, Debug features, UPF support, Low Power features, systemverilog, Scan Boundary Scan, VHDL, DFX Design Planning
Skills:
Ecos, Verilog, Soc, Timing Closure, gate-level simulations, Synthesis, linting, ASIC, Digital Design, IP integration, systemverilog, Rtl Design
