C, X86, Arm, Python, RISC-V, Uvm, SVA, systemverilog, assertions, reference models, functional coverage, scoreboards

C, Python, Noc, RTL simulation, Emulation, debug methodologies, AMBA protocols, Uvm, systemverilog, power-management technologies

C, Debugging, Ovm, Shell Programming, Perl, Verilog, Arm, Python, Tcl, Uvm, Embedded Low-level programming, DFD, UPF, systemverilog, GLS, Dft, SoC Verification Flow, Clock Domain Crossing verification, Testbench implementation

C, Verilog, automation, Scripting, coverage closure, RTL testbench debugging, Uvm, systemverilog

C, Arm, verification methodologies, RISCV, DSP core, Uvm, functional coverage, Verification Tools

Verilator, CVM, Uvm

CHI, Axi, AMBA, RISC-V instruction set architecture, APB, Ace, UVM-based testbenches