Signal Integrity, SDC constraints, MCMM, MMMC, setup hold analysis, timing optimization, timing ECOs, Timing Analysis, Cadence Tempus

synopsys primetime , Perl scripting, Static Timing Analysis, SDC constraints, RTL Synthesis, STA timing constraints, mmc, Timing optimization, Critical path analysis, ASIC SoC implementation and signoff methodologies, Setup hold analysis, Timing Closure, MCMM, Synopsys Design Compiler, ECOs and timing fixes

synopsys primetime , Perl, Shell scripting, Python, Tcl, Timing exceptions, jitter, Clock skew, ECO implementation, MMMC timing analysis, Synthesis, Timing signoff methodologies

STA Engineer, Timing Lead, primetime, PT-DMSA, OCV/AOCV/POCV, Signal Integrity, TCL scripting skills, Tempus, ECO generation, PNR

synopsys primetime , Ecos, Python Scripting, Sta, Physical Design concepts, SDC, SI analysis, MCMM, MMMC, SOCV, Timing Closure, AOCV, Innovus, Fusion Compiler, StarRC, ICC2, Tempus