Jtag, DFT Engineer, DFT Manager, iJTAG, BSCAN, ATPG, technical ownership, DFT tools

occ, compression at core level, coverage analysis, DFT architecture, Memory-BIST, no-timing simulations, ATPG pattern generation, SSN architecture, timing simulations, Scan Insertion, clock architecture

Scan Insertion, ATPG, Silicon bring-up knowledge, Tessent DFT Compiler, MBIST, LBIST