Verilog, Python, Tcl, Physical Verification, Sign-off Optimizations, High Performance Synthesis, Constraints Synthesis, Physical Design, Electrical Checks, systemverilog

bandgap references , Charge pump, Comparators, silicon debug, Analog IC design, OPamps, ESD and latchup concepts, Serial transceiver design, High voltage Tx and Rx design

Design for Manufacturing (DFM), Engineering Bills of Materials (EBOMs), Engineering Change Orders (ECO), Finite Element Analysis (FEA), IFS ERP, Fugitive emission testing ISO 15848-1, Solid feature manipulation, Large assembly management, Drawing generation, Solid geometry creation, PTC Creo Solid Modeling, Hydrostatic testing, API fire-safe qualification testing

Cadence Sigrity, stack-up definition, Cadence PCB design tools, Design Entry HDL, Cadence Allegro Package Designer APD, Allegro X PCB Editor, bump ball map planning, Cadence SKILL, Cadence Innovus, power delivery network design, Keysight ADS, advanced packaging Cu Pillar bump technology, fine-pitch UBM design, impedance control, length matching, Ansys HFSS, substrate routing, Ansys IcePack, Cadence Celsius

Sheet metal drafting, Injection mold part design, Materials manufacturing processes, Design for manufacturability, Assembly and cost optimization

assembly drawings , Solidworks, component selection, Fea, Joint design, design for assembly, 2D component drawings, Manufacturing process understanding, Material Selection, Engineering calculations

windpro , wind turbine design , Python, MS-office, Wind farm layout design, Environmental Impact Assessment, OpenWind, Energy yield analysis, Electrical SLD panel schedules, Autocad

power integrity , Routing, CTS, floorplanning, Low-Power Design, Synthesis, Physical Verification, Timing Closure, Placement, Sign-off, Multi-Voltage Domains, Physical Design implementation

Perl scripting, Tcl Scripting, Python, Sta, setup hold analysis, floorplanning, CTS routing, Cadence Innovus, physical optimization, LVS, MMMC-based implementation, full-chip Physical Design, ECO implementation, physical and timing ECOs, Dft, RTL synthesis, Timing Closure, DRC, Placement