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Showing 7 jobs
Skills:
Verilog, System Verilog, Synopsys VCS, Cadence IES, formal property checking tools, Uvm
Skills:
C, System Verilog, SoC Verification
Skills:
Vcs, System Verilog, Verdi, DVE, Xcelium, Questa, Uvm, SVA assertions
Skills:
Verilog, Ovm, System Verilog, Synopsys VCS, Cadence IES, VMM, formal property checking tools, Uvm
Skills:
Verilog, System Verilog, Synopsys VCS, Cadence IES, formal property checking tools, Uvm
Skills:
Vcs, Regression Testing, systemverilog, Questa, Uvm, Testbench Development, Verification Plan Creation, Protocol Compliance, Modelsim, Simulation Debugging, formal verification, DDR Verification, Verification Coverage
Skills:
Verilog, System Verilog, Synopsys VCS, Cadence IES, formal property checking tools, Uvm
