asme standards , Part Design, Enovia PLM, GSD, Sheetmetal, Catia V5, CAD automation, FTA, Assembly Design

Version Control, configuration management, PERL, Python, Tcl, AI tools, PPA, multi-patterning, Skill, LVS, cell layout optimization, flow automation, DRC, Cadence Virtuoso

rtl development , Vcs, Gdb, Shell, Perl, Verilog, Python, ASIC design flow, floor-planning, scripting knowledge, Simulation Tools, Timing Analysis, Logic Synthesis, debug tools, Eco, design and verification tools, micro-architecture, Debussy, bring-up lab debug

C, Pcie, Perl, Python, Tcl, ONFI, LPDDR, NAND

hardware engineering , Automation, Deep sub-micron technology, Multi-voltage domains, Circuit Design, Power gating, UPF, Physical Design, Synthesis, ASIC design flows, Sign-off optimizations, device physics, Low power design implementation

Aes, Perl, Python, Tcl, AES-XTS, MACsec, Uvm, SVA, systemverilog