Usb, Mercurial, Svn, DDR, Git, Perl, Pcie, Ethernet, Python, Tcl, UVM methodology, AMBA, SoC level verification, UVM based verification environments, Design Verification infrastructure

Perl, Vcs, Python, Tcl, Verdi, Questa, Uvm, systemverilog

Vcs, functional coverage assertions, Questa, Uvm, SVA, systemverilog

Keysight, Exercisers, LeCroy, PIPE Interface verification, Uvm, PCIe Protocol Gen5, systemverilog, Protocol Analyzers

wireless protocols , modem, System Verilog, Wifi Standards, constraint random tests, assertion coverage-based verification methodology, debugging RTL TB issues using Verdi, Uvm, formal static verification methodologies