Unix, ESD protection schemes, Latch-up prevention, skill programming, Cadence Virtuoso Layout XL, Calibre verification tools, Cadence Design environment, layout dependent effects, P R methods, SKILLCAD

Routing, Pvs, PERL, Tcl, R3D, PEX, LVS, Layout Techniques, Verification, Skill Programming, CAD Tools, Calibre, Analog Layout, ERC, VCAR, DRC, VSR, virtuoso

Synopsys IC Validator, Calibre DRC LVS PEX, high-speed analog and mixed-signal layout design, Custom Compiler, LVS, Cadence Pegasus, DRC, Cadence Virtuoso Layout Suite, ERC checks, 7nm FinFET technology

synopsys tools , Analog Circuit Design, Mentor Siemens Calibre, Physical Verification, ERC, DRC, Custom Layout, LVS, Cadence Virtuoso, Analog Layout Design

layout verification , automation, Mentor Graphic Calibre DRC, AI tools, Layout Design, skill coding, Cadence VLE