Switch, Pcie, Virtualization, Verification tools for simulation and debug, UFS, XUSB, High Speed IO verification, 1G Ethernet MAC, Uvm, Security, Sensor processing, Memory controller verification, Axi, Interconnect verification, APB, VMM, Safety, CPU verification, formal verification

Verilog, Ovm, DFI protocol, LPDDR4, DDR PHY verification, Uvm, JEDEC standards, systemverilog, LPDDR5

Ovm, Assembly Language, C, PERL, Verilog, Shell script, System Verilog, Systemc, Emulation, Uvm, SoC Verification, dpi

bandwidth management , Microprocessor Cores, SystemVerilog Assertions, Specman E, Verification and debug of IP subsystem SoCs, Industry-standard simulators, Revision control systems, Constrained-random verification environments, systemverilog, Packet processing, Regression systems, Congestion control, Hierarchical memory subsystems, Full verification life cycle, Vector processing units