Senior Verification Engineer
Senior Verification Engineer
ALTEN Calsoft Labs- Posted a month ago
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Job Description
IP/ SoC Verification Engineer
Job Description:
- Must have good knowledge on the verification flows.
- Excellent hands-on debug skills and problem solving attitude..
- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC
- Experience of working on Functional Verification, SoC Verification, Emulation.
- Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language.
- OVM/UVM Methodology knowledge and experience.
- Must have good communication skills and the ability to work in a team environment.
- Preferably having experience in architecture such as x86 or ARM domain based SOCs
having SOC/IP performance verification background is added plus.
Experience: 4 to 12 Years
Location: Bangalore
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Key Skills
About Company
Skills:
C, Perl, Verilog, Gdb, Python, Indago, SOC design, Cadence
Skills:
Uart, Nvme, Verilog, I2c, Pcie, Flash, system debug infrastructure, Uvm, system memory hierarchy, AMBA bus protocols, systemverilog, digital ASIC design and verification, formal verification, ARM cores and related infrastructure, CXL, DRAM, CPUSS C-based verification, multi-core SOC, SSP
Skills:
Fpga, Perl, Python, Emulation, RTL, Uvm, systemverilog
Skills:
C, Verilog, Scripting, RTL testbench debug, interconnects, memory hierarchy, Arm-based SoC architecture, Uvm, UPF, systemverilog, coverage closure, coherency
Skills:
Debugging, Ovm, Verilog, System Verilog, Problem-solving skills, Functional Verification Coverage, Uvm, formal verification, DDR-PHY Design Verification, Design Verification of complex IPs, Low Power Verification, Gate Simulation