Sta, LINT, cdc, primetime, post-layout STA, Tempus, LEC, GLS, Dft, Synthesis, Timing Closure, SDC constraints development, ETM timing model validation, SDF generation, MMMC analysis

primetime, Fusion Compiler, ICC2, Mentor Graphics

Tcl, Python, Perl, RTL to GDSII, LVF POCV variation formats, Constraint Generation, STA Static Timing Analysis, Cadence Tools, Tweaker Prime Time, Automation scripts, Timing ECO Implementation, Timing Closure, Timing Analysis, Digital design Implementation

monte carlo , Perl, Python, Tcl, FineSim, Hspice, PT Tempus, Spice, Layout Parasitic Extraction, Signal Integrity, ICC, digital flow design, RTL to GDS, primetime, Innovus, ASIC back-end design flows, STA setup convergence, Timing Analysis

Tcl, Python, IO Timing interface budgeting, ECO generation flow, ASIC timing constraints generation, primetime, logic equivalence, PT-DMSA, Timing Closure, Dft, timing congestion

synopsys primetime , Shell Scripting, Perl, Python, Tcl, OCV, CTS Interaction, cdc, Tempus, Setup Hold Analysis, StarRC, Timing Exceptions, POCV, Si, Low-Power Timing Methodologies, AOCV, Timing Convergence Techniques, Timing Signoff