Unix, Lsf, Jenkins, Git, Shell, Linux, Verilog, Gitlab, Python, Tcl, Synthesis, cdc, Simulation, RTL, make, systemverilog, RDC, UGE, LINT, Low Power, Slurm

Github, Cmake, Groovy, Msbuild, Shell, Docker, Sonarqube, Python, Msi, Wix, Cloudformation, PowerShell, C Sharp, Jenkins, Git, DevSecOps, Jfrog, AWS CDK, SBOM, GitHub Actions, CI CD architecture and platform engineering, AWS cloud architecture and services, Infrastructure as Code using Terraform, CodeQL, Monitoring and observability technologies

Scripting, Java, C, Computer Architecture, Linux Internals, Python, Operating System Concepts, Device Drivers, Assembly

static timing analysis, Perl, Verilog, Python, Tcl, Rtl Design, Synthesis, Dft, ATPG, systemverilog

Python, Perl, AHB, JasperGold, Uvm, formal verification, VC Formal, systemverilog, APB, Axi, AMBA protocols

boundary scan , Perl, Verilog, Python, Tcl, SOC design, Cadence Xcelium, Siemens Tessent, ATPG generation, Cadence Genus, IJTAG integration, Siemens Questa, Dft, fault coverage analysis, Scan Insertion, Scan Architecture, VHDL, ASIC, JTAG implementation, MBIST insertion, Synopsys TetraMAX, DFT DRC closure