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Job Description:

Are you passionate about solving complex verification challenges and driving first-pass silicon success for industry-leading microcontrollers

As a Senior Technical Staff Engineer in our dsPIC Microcontroller Business Unit, you will be a key technical leader responsible for ensuring the functional integrity of next-generation 16-bit and 32-bit MCU products. You will architect and execute advanced verification strategies for complex SoCs featuring ARM-based and proprietary processor architectures, while influencing verification methodology, automation, and technical direction across multiple programs.

This role is ideal for a highly experienced verification engineer who thrives on deep technical problem solving, enjoys mentoring others, and wants to make a broad impact on product quality and verification excellence.

What You Will Do

• Contribute as a senior technical member of a global verification team developing advanced microcontroller products.
• Own and execute comprehensive SoC-level verification plans from architectural specification through tape-out.
• Serve as a technical leader across projects by driving verification strategy, influencing architectural decisions, and establishing best practices that enable verification excellence and first-pass silicon success.
• Develop verification environments, reusable testbench components, and stimulus using SystemVerilog and UVM methodologies.
• Verify complex digital IP and subsystem integrations at block, subsystem, and full-chip levels.
• Drive RTL, gate-level, and full-chip verification for next-generation microcontroller products.
• Develop functional safety verification strategies, fault-injection tests, coverage models, and safety metrics.
• Debug challenging full-chip issues spanning architecture, RTL design, firmware interaction, and verification infrastructure.
• Define and track coverage goals including functional, code, assertion, and safety coverage to ensure verification completeness.
• Partner closely with architecture, design, firmware, and validation teams to resolve complex technical issues and improve product quality.
• Champion verification best practices, reusable methodologies, and automation frameworks that improve productivity, quality, and predictability across projects.
• Mentor junior engineers and provide technical leadership through design reviews, methodology guidance, and hands-on problem solving.
• Drive adoption of advanced verification techniques including formal verification, assertion-based verification, automation, and AI-assisted engineering workflows.

Why Join Us

You will work on cutting-edge microcontroller technologies, collaborate with world-class engineering teams, and influence verification strategy for future product generations. This role offers the technical depth of a senior individual contributor position while providing significant impact on architecture, methodology, automation, and engineering excellence across the organization.

Hiring Manager Perspective

The strongest version of this posting positions the candidate as:

• Technical owner, not a people manager.
• Verification methodology leader, not just a testbench developer.
• Automation and AI adopter, not merely a user of verification tools.
• Mentor and technical influencer, without requiring direct management responsibility.
• Driver of first-pass silicon success, functional safety, and full-chip verification closure.

That combination is designed to appeal to high-caliber Staff and Principal verification engineers.

Requirements/Qualifications:

Required Qualifications

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
• 12+ years of experience in digital design verification with a proven track record of successful SoC or MCU product tape-outs.
• Strong expertise in SystemVerilog, UVM, and coverage-driven verification methodologies.
• Hands-on experience verifying complex SoCs containing ARM or comparable embedded processor architectures.
• Deep understanding of AMBA protocols including AXI, AHB, and APB.
• Experience developing verification plans, testbenches, checkers, assertions, and coverage models.
• Strong debugging skills across RTL, simulations, regressions, and full-chip integration environments.
• Ability to influence technical decisions and collaborate effectively across geographically distributed engineering teams.
• Excellent communication and technical leadership skills.

Preferred Qualifications

• Experience with Formal Verification methodologies and tools such as JasperGold or VC Formal.
• Expertise in gate-level simulations, low-power, and power-aware verification methodologies.
• Familiarity with functional safety standards and safety verification approaches, including ISO 26262.
• Experience with fault-injection simulations and functional safety coverage analysis.
• Strong expertise in verification automation, scripting, and productivity tools (Python, Perl, or similar), with experience leveraging AI-assisted technologies to improve verification quality, accelerate debug, optimize regression efficiency, and drive faster coverage closure.
• Knowledge of post-silicon validation and alignment between pre-silicon verification and silicon bring-up activities.
• Exposure to mixed-signal or AMS verification environments.
• Prior experience providing technical leadership, mentoring engineers, or leading methodology and automation initiatives within a verification organization.