matching , Dac, Perl scripting, Latch-up, Bandgap Ref Generators, Analog Layout fundamentals, Charge Pump, Critical Analog Layout design, cross-talk, Calibre, IR-drop, Comparator, Cadence Virtuoso, DRC, Temperature sensor, Current Mirrors, active and passive parasitic devices, Differential Amplifier, LVS, coupling, analog custom layout design, Electro-migration, ADC, LDO, Pll, advanced CMOS process

Design for manufacturability and testing considerations, Analog Layout, Power distribution challenges, Parasitic Extraction, Analog circuit design principles

Dll, Analog Layout, Virtuoso-XL, Digital Place Route, Physical Verification, Calibre, SKILL Programming Language, ADC, virtuoso, LNA, Custom Layout, LDO, Assura, VGA, Hercules, Pll

Electro migration, Analog Layout Engineer, Virtuoso schematic, parasitic analysis, virtuoso

CMOS, VLE/VXL, Analog Layout, Cadence, DRC/LVS, Mask Design

shielding , Tcl, Perl, Common Centroid, LVS, Interdigitation, PEX, FinFET technologies, Deep N-Well Guard Rings, Mentor Graphics Calibre, Cadence Virtuoso VXL GXL, DRC, matching techniques, isolation, Skill

layout techniques for analog and mixed-signal circuits, Cadence Virtuoso Layout Editor VLE VXL, Mentor Graphics Calibre DRC LVS