Custom layout design, High-speed IPs, Floorplan constraints, High-speed Analog Serdes, Data converters, LVS, Scripting and automation, Analog Macros, IP integration, Physical verifications, Pll, Analog layout techniques, power management, DRC, Ageing and Reliability Compliance, Full Spectrum Verifications, Electrical check

Custom layout design, High-speed IPs, Floorplan constraints, High-speed Analog Serdes, Data converters, LVS, Scripting and automation, Analog Macros, IP integration, Pll, Physical verifications, Analog layout techniques, power management, DRC, Ageing and Reliability Compliance, Full Spectrum Verifications, Electrical check

Phase Interpolator, SERDES, Driver, Circuit Simulation, Physical Verification, Deserializer, Layout, CMOS design, Bias and Bandgap Voltage Regulators, Receiver, jitter and signal equalization techniques, High Speed Clock Distribution, Serializer, Low jitter PLL

Logic Design, DDR, HBM technologies, Tx Rx CTLE Amplifiers Samplers, system level design, AMS verification, Lab debugs on AMS IPs, Analog Mixed Signal design, High-speed circuits, AMS design techniques, Mixed Signal IP design, Circuit architecture, SERDES

high-speed AMS circuits, SerDes design, lab equipment for testing and characterization, high-speed digital design, circuit simulation and analysis, TX RX and PLL components, signal integrity analysis