PCIe Formal Verification Engineer, PCI Express, formal verification, FPV, SVA, SystemVerilog Assertions, Questa Formal

SoC Verification, formal verification techniques and tools, model checking, equivalence checking

Data Flow Graphs (DFG), Binary Decision Diagrams (BDD), Verilog, System Verilog, model checking, abstraction modeling, formal verification tools, convergence strategies, equivalence checking, simulation techniques

Verilog, VHDL, formal verification, Chisel, JasperGold, VC Formal, Object-oriented Programming, systemverilog, Formal Abstraction Techniques

Cpu, Gpu, Scripting, formal verification, Temporal Logic Assertions, Formal Verification Tools

formal verification, digital design concepts, debugging complex design bugs, Questa, convergence techniques, JasperGold, Formal OneSpin, VC Formal, formal coverage metrics, RTL coding in Verilog

Debugging, Scripting, formal verification, assertions, hardware micro-architecture, testplans

formal verification, SVA, Property-based FV