Scripts, sign-off processes, physical verification checks, ERC, physical verification methodologies, EDA Tools, DRC, automation flows, LVS, ASIC physical verification methodologies

Samsung foundries, Dfm, Antenna, Arm CPU designs, LVS, DRC, Physical Verification, TSMC, advanced technology nodes, PERC

Perl, Scripting Languages, Python, Tcl, PERC, physical design verification flows, LVS, constraints synthesis, dummyfill checks, Calibre, ERC, ESD signoff, DRC, antenna DFM, Clock Tree Synthesis

Physical Design Verification, FinFet designs, Calibre, DRC, ESD coverage techniques, LVS, Physical Verification flow automation, DFM techniques, Siemens tools

Perl, Shell scripting, Python, Tcl, Physical Verification, Mentor Calibre, ERC, DRC, Density checks, LVS, Synopsys ICV