DDR, Perl, Verilog, Python, Tcl, spyglass, Axi, MIPI, AMBA, EDA Tools, Synopsys Design Compiler, LPDDR, AHB

layout verification , Computer Engineering, System Verilog, Tcl, low-power designs, Electrical Engineering, Computer Science, Vlsi Design, design rules

PERL, Verilog, Static Timing Analysis, Python, Ethernet, Tcl, LINT, ASIC Synthesis, cdc, AMBA Bus, SoC integration, Synopsys toolsets, Rtl Design, VHDL, equivalency checking, HBM, ARM core-based designs, PCIe Gen5, USB4.x, UCIe, FPGA prototyping, Axi, APB, FPGA based designs, AHB, ip development