Scripting Language, Usb, DDR, Pcie, Ethernet, Sata, System Verilog, Midi, Uvm, MIPI, CXL, LPDDR, 801.11, WiFi

Makefile, Windows, Shell, Linux, Python, IP-level ASIC verification, simulation profiling, UVM methodology, UVM testbenches, debugging RTL code, systemverilog, acceleration, formal verification, testbenches, Efficiency Improvement, UVM-based verification frameworks

Git, Perl, Jira, Python, Uvm, systemverilog

Ethernet IEEE 802.3, waveform analysis, log tracing, Uvm, directed testing, systemverilog, functional and code coverage closure

Verilog, Matlab, Python, FPGA-based emulation, analog mixed-signal modelling, DSP concepts

shell scripting, Verilog, Unix, Python, Uvm, VerilogAMS, systemverilog