code coverage , Vcs, Perl, Shell scripting, Python, Tcl, NC Xcelium, Asic verification, Uvm, systemverilog, constrained-random verification, functional coverage

Jtag, Verilog, Debugging functional and toggle coverage, CHI, DFT concepts, System Level Testing, Uvm, systemverilog, Axi, lbist, APB, Predictive In Field Testing, MBIST

System Verilog, MPHY, UFS, Unipro, Asic verification, Uvm

code coverage , Usb, Hdl Languages, DDR, Shell, Pcie, Perl, Ethernet, Python, Debugging, verification test plans, constrained-random test cases, UCIe, Uvm, systemverilog, CXL, simulation test benches, architectural design specifications, verification requirements, verification methodologies

Design Verification, ASIC Design, Verification Planning, systemverilog, Rtl Design

Perl, Python, UVM based verification environments, Verdi or equivalent debug tools, systemverilog

C, Uart, Bash, Spi, DDR, Pcie, Perl, Verilog, I2c, Python, System Verilog, Tcl, i2s, DFX Verification, Uvm, Axi, APB, AHB