Jira, Pcie, SFDC, Ethernet, Test Methodologies, Sta, ADC, Tx and Rx Equalizers, Phase Locked Loops, Noise, board design, gate level verification, jitter, UCIe, case management systems, DFT flows, AI-powered tools, Synthesis, Verilog RTL design

Usb, Pcie, Test Methodologies, Ethernet PHYs, Sta, ADC, Tx and Rx Equalizers, Noise, Phase Locked Loops, board design, gate level verification, jitter, UCIe, AI-powered analytics, DFT flows, AI-powered tools, Synthesis, Verilog RTL design, DPHY

product security , threat modeling , DAST, Vulnerability Management, Network Security, DevSecOps, Application Security, Cryptography, Secure Design Principles, Security Architecture, Security Risk Assessment, supply chain security, STRIDE, Secure Software Development Lifecycle, SAST, PASTA

Creo, Material behavior properties, Dfmea, Dfm, Design And Development, Metrology, Windchill, Fea, DFA