Lead Product Engineer
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Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Lead Product Engineer
Location: Bangalore
About Us
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. This strategy is supplemented by AI-augmented development practices throughout all our organizations to empower our team to focus on creative problem-solving and innovation. Our customers are the world's most innovative companies, delivering extraordinary electronic products—from chips to boards to systems—for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success.
Position Overview
Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance IP related to protocols such as UCIe, PCIe, USB, DPHY and Ethernet PHYs.
The role will be a key member of technical staff in an organization responsible for IP activities including but not limited to Pre-sales engagement with potential customers, Pre-Silicon integration and Post silicon bring-up and test support for the customers. This candidate will be the primary interface between customer and CDNS R&D team. Candidate should possess strong communication skills with ability to manage multiple priorities on day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must have attributes in this role.
Key Responsibilities
Skills & Qualifications
Job Title: Lead Product Engineer
Location: Bangalore
About Us
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware, and IP that turn design concepts into reality. This strategy is supplemented by AI-augmented development practices throughout all our organizations to empower our team to focus on creative problem-solving and innovation. Our customers are the world's most innovative companies, delivering extraordinary electronic products—from chips to boards to systems—for dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health. Join us and be part of a culture that values innovation, collaboration, and customer success.
Position Overview
Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP products. This is a tremendous opportunity to work with an experienced team focusing on development of high-performance IP related to protocols such as UCIe, PCIe, USB, DPHY and Ethernet PHYs.
The role will be a key member of technical staff in an organization responsible for IP activities including but not limited to Pre-sales engagement with potential customers, Pre-Silicon integration and Post silicon bring-up and test support for the customers. This candidate will be the primary interface between customer and CDNS R&D team. Candidate should possess strong communication skills with ability to manage multiple priorities on day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must have attributes in this role.
Key Responsibilities
- Responsible for supporting integration / customization of CDNS SERDES IP subsystems.
- Analyze and resolve complex subsystem application or implementation issues and provide professional guidance to customers.
- Support PHY and controller SOC integration reviews, and integration questions.
- Perform RTL and gate level simulations to verify functionality.
- Assist customers with gate level simulations and timing closure.
- Participate in development of CDNS documentations and checklists for customers.
- Support post silicon bringup and deployment activities by our customers.
- Enhance customer experience by providing prompt updates to customers
- AI Incorporation: Leverage AI-powered tools and assistants to enhance productivity, improve decision making, and maintain high-quality customer deliverables. Apply AI-powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets.
- Experience working with UCIe, PCIe, Ethernet, 112G or similar interface IP.
- Verilog RTL design and gate level verification experience.
- Synthesis and STA experience, back-end experience is a plus
- Familiarity with industry standard DFT flows and test methodologies.
- Familiarity with package and board design.
- Ability to read schematics and participate in SI/PI reviews for customer board/package implementation
- Knowledge of circuits such as Phase Locked Loops, Tx and Rx Equalizers, ADC's etc.
- Familiar with concepts of Jitter, Noise, and other non-idealities in circuits
Skills & Qualifications
- Broad technical background with understanding of standard design flows, tools, and usage of hard and soft IPs.
- Strong communication and organizational skills.
- Experience with case management systems (SFDC, Jira).
- Ability to prioritize cases, anticipate escalations, and manage technical reviews.
- High-level understanding of technical issues; able to coordinate with subject matter experts.
- Proactive in gathering feedback and driving continuous improvement.
- Influential and collaborative, able to manage resources across the organization.
- Skilled at listening to customer concerns and identifying potential issues.
- Committed to customer satisfaction and timely case closure.
- Bachelor's in computer science or electrical engineering + 5 years of related experience, or Masters +3 years of related experience.
- Experience in memory and/or communication interface IP protocols (DDR, LPDDR, GDDR, HBM, PCIExpress, Ethernet, USB, UCIe, etc).
- A general grasp of circuit architecture and design fundamentals
- Understanding of Analog/Mixed signal design practices
- Bachelor's in computer science or electrical engineering + 8 years of related experience, or Masters + 5 years of related experience.
- Experience with usage of AI tools in rapid prototyping and development (vibe coding) and general experience with effective AI prompting.
More Info
Key Skills
AI-powered tools
gate level verification
Verilog RTL design
package and board design
UCIe
DFT flows
About Company
Skills:
Logic Design, shell scripting, Perl, System Verilog, Tcl, Cadence Tools, physical aware synthesis, HDL – Verilog, Logic Synthesis, Synthesis, formal verification, low power design, Physical Design, Timing Closure, EDA Tools, Genus Synthesis Solution
Skills:
Jira, Pcie, SFDC, Ethernet, Test Methodologies, Sta, ADC, Tx and Rx Equalizers, Phase Locked Loops, Noise, board design, gate level verification, jitter, UCIe, case management systems, DFT flows, AI-powered tools, Synthesis, Verilog RTL design
Skills:
HDL - Verilog, Logic Design, Perl, shell scripting, System Verilog, Tcl, Synthesis, formal verification, low power design, Physical Design, EDA Tools, Timing Closure, digital ASICs, Genus Synthesis Solution
Skills:
Developing Verification environments using System Verilog, Problem-solving and debugging, Verification and Design, UCIe domain, UVM methodology, Functional Verification