Perl, Shell scripting, DFT verification, Scan Insertion, Synopsys Tetramax DFTMAX, IEEE1500, ATPG patterns verification, Test cost reduction analysis, DFT architecture, VCS simulation tool, Scan memory BIST, Verilog RTL design, JTAG 1149.x, ATPG pattern generation, Design for Test methodologies, Mentor testkompress, Post silicon support

composer , bigtable , BigQuery, Scala, Spring Boot, Gcp, Linux, Iis, Shell scripting, Spark, Airflow, Event Engine, GitHub Actions, Windows VM, TIMS

Perl, Shell scripting, DFT verification, Synopsys Tetramax DFTMAX, VCS simulation tool, IEEE1500, Scan memory BIST, JTAG 1149.x, Verilog RTL design, Mentor testkompress, Design for Test methodologies

redhawk , Yaml, Perl, Tcl, Sta, BaseDRC, Synthesis, CTS extraction, Fusion Compiler, Formality, LVS analysis, Timing Analysis, Place And Route, Power Efficiency techniques, primetime, Physical Verification, timing eco’s, EM fixes, DRC, ECO methodologies, ICV, Cadence Innovus flow

Embedded C Programming, Shell, Test Plan Creation, Python, hardware-level access control, silicon debug, ADI, ARM CPU, cryptographic concepts, Lauterbach Trace32 scripting, SoC architectures, hardware security functions, AMBA, ARM v8, RISCV, data acquisition, Veloce, silicon bring-up, secure boot, emulation platforms

ServiceNow Discovery, MID Server installations, agent-based discovery setup

perl, Shell, Scripting Languages, Tcl, Sta, Timing Analysis, Vlsi Design, Make flow, Timing Closure, constraints development, equivalence checks, low-power synthesis