Foundry DRM, IC Validator, ASIC PV, ESD verification methodologies, Calibre ICV, pegasus, DRC, Physical Verification, LVS, Advanced nodes 4nm and below

power optimization , python, perl, Routing, Tcl, CTS, Signoff checks, Timing ECOs, Timing Analysis and Closure, DFT insertion, EM IR flows, Scan DFT modes, RTL to GDS, Physical Verification, Extraction, Placement, Timing Constraints Development, Check Timing Analysis, Floor-planning, Digital Synthesis, Check Design