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Showing 7 jobs
Skills:
low power design, Sta, Block and SoC level Synthesis, Block and SoC level equivalence check, Block and SoC level timing convergence, Timing ECO generation
Skills:
synopsys tools , .lib generation, python, perl, Tcl, STA tools, PD circuit simulation, ICC2
Skills:
STA Engineer, constraint development
Skills:
RTL2GDS, physical design EDA tools, Sta
Skills:
primetime, Fusion Compiler, ICC2, Mentor Graphics
Skills:
Sta, RTL2GDS, EDA Tools, Timing Analysis, Physical Design
Skills:
Sta, GLS, post-layout STA, Synthesis, SDF generation, LINT, LEC, cdc, primetime, Tempus, MMMC analysis, ETM timing model validation, Timing Closure, SDC constraints development, Dft
