hardware engineering , rf tools , Measurement instruments, Oscilloscopes, Circuit logic design validation, Optical systems, Spectrum analyzers, DSP systems

Jtag, System Verilog, Static timing analysis, DFT techniques, IEEE 1500 Standard, Commercial test generation tools, Logic diagnosis, Yield learning, Synopsys DFT Max, Tetramax tools, Verification UVM methodology, Mentor Tessent, IEEE 1687 standard, ATPG test pattern translation, ATPG tools, Scan insertion tools, Chip design Verilog, MBIST, Familiarity with ATE, Scripting Perl, Scan compression, Test compression software, Gate-level simulations, LBIST

Verilog, Cadence IC design flow and tools, POR circuits, FPGA design generation flow, ADCs, Circuit theory design and layout, Lab testing of analog blocks, High accuracy comparators, DACs, VHDL, Filters, Mixed-signal circuits, Analog Design, Bandgap

post layout parasitic extraction, Monte Carlo analysis, integrated power converters, bandgaps, block level topology selection, Spectre, Cadence tool set, switching regulators, schematic generation, DACs, VHDL, charge pumps, Amplifiers, PMICs, Spice, mixed-signal IC design, Analog Design, Comparators, IC CAD tools, precision analog control

AutoCAD (Mandatory), Strong knowledge of local development regulations (BMRDA & BDA), • Layout & Master Plan Experience is mandatory., • Preparation of architectural drawings for high-rise residential and commercial buildings., Strong experience in high-rise, Villas, and township projects, Knowledge of BMRDA and BDA guidelines for approvals and compliance

Figma, Prototyping, Visual Design, Interaction Design, Accessibility, Wireframing tools, Typography, Spacing grids, Layout systems, Motion design tools, Adobe Creative Suite, WCAG standards

Software Quality Assurance, Product Validation, Test Infrastructure Improvements, Design for Testability Principles, Regression Quality Performance Benchmarking

tunnels , Network Protocols, Systems Integration, Qos, Test Architecture, Validation for complex SoC platforms, Throughput, Security, Network packet processor Datapath validation, interoperability, Certification workflows, Customer qualification, Traffic generators, CI CD pipelines, Test framework design, Python for test automation, Automated validation workflows